1. Field of the Invention
The present invention is directed toward the field of manufacturing integrated circuits.
2. Description of the Related Art
FIG. 1 illustrates a traditional metal oxide semiconductor ("MOS") field effect transistor 100, including a substrate 101 and a gate 102, which is separated from the substrate by a gate oxide 105. The substrate 101 is a wafer, which is made of a semiconductor material, such as silicon. A drain 103 and a source 104 are formed in the substrate 101. In a p-type MOS transistor, the substrate 101 is doped with n-type impurities, and the source 104 and drain 103 are doped with p-type ions. In a n-type transistor, the substrate 101 is doped with p-type impurities, and the source 104 and drain 103 are doped with n-type ions. The transistor 100 is isolated from the effects of other circuits and contacts (not shown) formed on the wafer by a field oxide 106.
The threshold voltage of a MOS transistor is a critical feature in determining the speed and power consumption of a MOS transistor. When the voltage potential between the transistor's gate and source exceeds the threshold voltage, a channel forms beneath the transistor's gate to enable current to flow between the transistor's source and drain. As the threshold voltage is reduced, the transistor's switching speed increases, but the transistor's power consumption increases.
Further, a MOS transistor should have a sufficiently high punch-through breakdown voltage to be reliable. If the punch-through breakdown voltage potential between the gate and source is exceeded during the operation of the transistor, current will flow further into the silicon substrate away from the gate, thereby causing the gate to lose its switching capability. A punch-through breakdown voltage in the range of 3 to 5 volts is desirable, but it should be at least 2 volts.
The substrate 101 on which the transistor 100 is formed may be doped with impurities to set the level of the transistor's threshold voltage and punch-through breakdown voltage. However, these impurities can impede the performance of the transistor 100 when they are diffused or implanted into regions of the substrate 101 in which the transistor's source 104 and drain 103 are to be formed. As a result of the impurities being present in the source 104 and drain 103, the mobility of the holes and electrons in the transistor's channel during operation is reduced, and the channel current is weakened.
FIG. 2(a) illustrates a step in the manufacturing process of the transistor 100 shown in FIG. 1. The source 104 and drain 103 have not yet been formed in the substrate 101. The substrate 101 is being doped with ions 115 to set the transistor's threshold voltage. Region 110 forms beneath the surface of the substrate 101 as a result of the doping.
FIG. 2(b) illustrates another step in the manufacturing process of the transistor 100 shown in FIG. 1. The substrate 101 has been doped to establish a threshold voltage for the transistor 100, but the source 104 and drain 103 have still not been formed. The substrate 101 is being doped with more ions 116 to set the transistor's punch-through breakdown voltage. Region 111 forms beneath region 110 in the substrate 101 as a result of the doping to set the punch-through breakdown voltage.
The regions 110, 111 formed in the substrate 101 by the threshold voltage and punch-through breakdown voltage impurities 115, 116 extend throughout the regions of the substrate 101 where the transistor's source 104 and drain 103 are to be formed. This causes the above mentioned reduction in mobility and current flow in the transistor's channel. In forming a MOS transistor, it is desirable to reduce the effects of threshold voltage implants and punch-through breakdown voltage implants on the strength of the channel current in the transistor.
Further, the upper surface of the substrate 101, as shown in FIGS. 1, 2(a), and 2(b), is substantially planar. This is not optimum for establishing a high avalanche breakdown voltage for the transistor 100. A high avalanche breakdown voltage is beneficial, because it ensures that the transistor 100 will have a sufficiently large operating region. Traditional MOS transistors have avalanche breakdown voltages in the range of 3 to 5 volts, but higher avalanche breakdown voltages are desirable.